PKD01EY

The PKD01 circuit tracks an analog input signal until it reaches its maximum amplitude, which is then stored as a peak voltage on a hold capacitor. This monolithic circuit offers high performance and package density advantages over hybrid modules and discrete designs. The circuit features digitally selected hold and reset modes, allowing for reset to positive or negative voltage levels. It also includes an uncommitted comparator on-chip and is available in die form. The PKD01 utilizes voltage amplifiers and a diode or an emitter follower to charge the hold capacitor, C H, indirectly. The circuit's innovative design techniques maximize advantages in charge injection and droop rate error reduction. The transfer function of the PKD01 can be simplified to VOUT/VIN ≈ gm * RsC / (1 + sCgm), where gm is 1 µA/mV and ROUT is 20 MΩ. Optional offset voltage adjustment is available to correct zero-scale error components. Different nulling circuits are suggested for adjusting the circuit's operational mode and gain.

The function of the PKD01 circuit is to act as a Monolithic Peak Detector with Reset-and-Hold Mode .