The power of P5V_DUAL is H after LS7A_GPIO1 is H, turn off PQ23 and turn on PQ23. It is provided by P5V. From the figure, we can see that the S terminal is connected to the input terminal and the D terminal is connected to the output terminal. Is there any problem with this connection?
A colleague said that this is an enhanced N MOS. This connection method can disconnect PQ23 when H2 is L. I am a little confused about what an enhanced N P MOS is.
Kato Posted on January 21, 2021
There seems to be a problem with this circuit. The body diode of PQ3 is always on, and P5V_DUAL always has output.
Ayumi Posted on January 21, 2021
No problem with the connection. Most MOSs are enhanced MOS transistors, that is, when Vgs is 0V, the MOS transistors are not conducting.
Nicki Posted on January 21, 2021
All you use are NMOS. You can see that without your PQ4, you use P12V, and your PQ7 uses PV5V. That’s why, this circuit uses your NMOS PQ3 as PMOS and combines it into a push-pull output. Doing so can reduce the number of components, the same type of NMOS output is better than PMOS.
