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# The role of the clock generator and the basic structure of the clock generator.

• March 8, 2021
• 1282

The clock distributor is a logic circuit that sends the input clock pulse to each output after a certain frequency division. The principle block diagram of its composition is composed of a modulo M counter and corresponding decoding circuit, or it can be composed of a ring counter.

The basic structure of the clock generator

Phase locked loop (Phase Locked Loop, PLL) is the core technology of the clock generator. Modern clock generators only need a quartz crystal to provide a reference frequency, and use more than one PLL with different ratio frequency dividers to generate various Frequency clock output, replacing multiple quartz crystals in traditional systems.

Among them, the PLL part has two input terminals, namely a reference frequency (Fref) and a feedback frequency (Fvco), and an output terminal (Fout). The relationship between the three can be formulated as follows.

Fout=(Fref·P)/(Q·N)

PLL is basically a negative feedback system that uses the feedback signal in the loop to lock the frequency and phase of the signal at the output end to the frequency and phase of the reference signal at the input end. The Phase Frequency Detector (PFD) compares the phase relationship and frequency difference between the reference reference frequency (Fref) and the feedback frequency (Fvco), and detects the phase difference between the two phases and the frequency difference, To affect the frequency output of the Voltage Controlled Oscillator (VCO). When Fref/Q is ahead of Fvco/P, UP high-level output will speed up Fout frequency; on the contrary, when Fref/Q is behind Fvco/P, DN high-level output will slow down Fout frequency, and finally reach the stability as indicated by the formula Output state, so only need to adjust the ratio between the P, Q, and R values of the PLL external frequency divider circuit to get the required output frequency.

The role of the clock generator

1. Provide the initialization clock signal when the main board starts, so that the main board can start;

2. Provide clock signals required by various buses in real time when the motherboard is running normally to coordinate the clock frequency of the memory chip. If the clock generator chip or crystal is broken, the system may not start, or it may not operate normally. The latter is specifically manifested as sudden and inexplicable crashes, sometimes operating normally and sometimes abnormally. If you suspect that there is a problem with the motherboard's clock generator, it is best to send it to a professional repair shop for repair.

The electronic components of the clock generator continuously generate voltage pulses at stable intervals, and all components in the product will perform operations in synchronization with this clock. Simply put, digital products must be controlled by a clock to accurately process digital signals, just like a biological heartbeat. If the clock is unstable, it may cause errors in the transmission of digital signals, or cause the digital equipment to fail to operate normally.

The technology of the clock generator is developing towards high frequency to meet the needs of the PC market. Using non-volatile silicon oxynitride silicon oxide (SONOS, SILICONoxidenitrideoxideSILICON) technology, high-efficiency 200MHz clock components can be made, which can be used on the desktop. The compiler of the platform is directly programmed. With the help of this compiler tool, system designers can complete the input and output clock settings without even being familiar with PLL technology, shortening the design time before product launches.

NXP

22+

NXP

19+/20+

NXP

21+

TI

22+

TI

22+

TI

22+

TI

22+

TI

21+