Micron Technology has streamlined the first batch of fourth-generation 3D NAND memory chips based on Micron's new RG architecture. The company is expected to produce commercial fourth-generation 3D NAND memory by 2020, but Micron warned that memory chips using the new architecture will be used only for specific applications, so its 3D NAND cost reduction will be minimal next year.
Micron's fourth-generation 3D NAND uses up to 128 active layers and continues to use CMOS in array design methods. New 3D NAND memories have changed the floating gate technology for gate replacement in an attempt to reduce size and cost while improving performance and simplifying the transition to next generation nodes. The technology was developed entirely by Micron and there is no Intel investment, so it is likely to be tailored to the applications that Micron hopes to target.
Micron's fourth-generation 128-layer 3D NAND success shows that the company's new design is more than just a concept. At the same time, Micron has no plans to convert all of its product lines into the original RG process technology, so the cost per bit of the company will not drop significantly next year. Nonetheless, the company promises to begin to reduce costs by fiscal year 2021 after extensive deployment of its subsequent RG process nodes.
Currently, Micron is increasing the production of 96-layer 3D NAND and will start using it in most of its product lines next year. 128-layer 3D NAND hardware does not immediately cause a significant cost per bit reduction, but will decrease over time. Subsequent process nodes (Micron's fifth-generation 3D NAND) may have at least 128 layers, and if widely used, it will greatly reduce the cost per bit of the product.