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What are the limitations of flash memory?

  • Published:2019-11-12 20:43:58
  • Come From:CMS
  • Click Count:52

Flash Limits

1, Block Wipe

One limitation of flash is that it can read or write even in a single byte. In, but the erase must be an entire block. Generally speaking, all bits in a certain area are set to "1", and all parts in the beginning block can be written. However, when any bit is set to "0", it can only be used by Clear the entire block to restore the "1" status. In other words, flash (especially NORFlash) can provide random read and write operations, but can not provide arbitrary random rewrites. However, the block above it can write a message as long as the existing "0" value (the 0 bit of the new value is a superset of the 0 value of the old value). For example, the value of a cell block has been erased to 1111, and then the message of 1110 is written. Next, this block can also be written to 1010, 0010 in sequence, and finally 0000. However, there are actually few algorithms that can benefit from this continuous write compatibility. In general, it is still a block erase and rewrite. Although the flash data structure cannot be completely updated in the usual way, it allows it to delete messages in a way that is marked as unavailable. This technique must be slightly modified in MLC devices that store more than 1 bit of data per cell.

2, memory loss

The other limitation of flash memory is that it has a limit on the number of rewritable cycles (most commercial SLC flash guarantees 100,000 wipes in the "0" area) Write capability, but other blocks are not guaranteed.) This result is partially offset by the number of computational writes and dynamic re-mapping of certain firmware or file systems for distributed write operations between dissimilar blocks; One technique is called wear leveling. Another method of processing is called bad area management. This method is to verify and perform dynamic retest when writing, and remove the block if the verification fails. For most mobile devices These wear management techniques can extend the life of their internal flash memory (even beyond the life of these devices). In addition, losing some of the data on these devices may be acceptable. As for a large number of data read and write cycles Flash memory is not recommended for high-reliability data storage applications, but this limitation does not apply to read-only applications such as routers and thin clients, which are often written only once or a few times over the life of the device. /p>

3, Read Interference

The flash memory read mode used over time will cause similar memory cell contents to change in the same block (become a write action) This is the so-called read disturb. The number of readings that cause the read disturb phenomenon is between the blocks being erased, usually 100,000 times. If you read continuously from a memory unit, this memory unit will It will not be damaged, but the damage is the surrounding memory unit that is read next. To avoid reading interference, the flash controller usually calculates the total number of block read operations since the last erase action. When the count value exceeds the set target value threshold, the affected block will be copied to a new block, and then the original block is erased and released into the block recovery area. After the original block is erased It will be like the new one. If the flash controller is not When there is immediate intervention, a read disturb error will occur, and if there are too many errors and cannot be repaired by the ECC mechanism, it will be accompanied by possible data loss.

4, Write (Program) Interference

Write interference (programming interference) means that when a page is written, adjacent bits are also raised due to the close proximity of the threshold voltage, resulting in adjacent bits. An error occurs. The flash charge is very unstable, and the floating gates of adjacent stored charges interfere with each other, causing bit errors between adjacent floating gates. The MLC is more susceptible to interference than SLC due to the presence of four sets of close voltages. p>

Flash

Flash memory is an electronically-cleanable programmatic read-only memory. A memory that is allowed to be erased or written multiple times during operation. This technology is primarily used for general data storage and for the exchange of data between computers and other digital products, such as memory cards and USB flash drives. Flash memory is a special type of EEPROM that is written in macroblocks. An erase of the early flash memory will erase the data on the entire chip.

The cost of flash memory is much lower than that of EEPROMs that can be written in bytes, making it the most important and widely adopted technology for non-volatile solid-state storage. Flash memory is visible on PDAs, laptops, digital walkmans, digital cameras and mobile phones. In addition, the use of flash memory on game consoles is increasing, replacing EEPROM for storing game data or SRAM with battery.

Flash is non-volatile memory. This means that it does not need to consume power in terms of saving data. Flash memory also has better dynamic shock resistance than hard drives. These features are why flash is widely adopted by mobile devices. Flash has another feature: it is very reliable when it is made into a memory card - even when immersed in water it is resistant to high voltages and extreme temperatures. The write speed of flash memory is often significantly slower than the read speed.

Although flash memory is technically an EEPROM, the word "EEPROM" usually refers to a non-flash type EEPROM with a cell block as a clearing unit. Their typical unit of clearing is bytes. Because the old-fashioned EEPROM erase cycle is quite slow, the large erase block of the flash flash has a significant speed advantage when writing large amounts of data. The most common packaging methods for flash memory are TSOP48 and BGA, and the standards on the logical interface are divided into two types due to the vendor camp: ONFI and Toggle. Flash memory on mobile phones often exists as eMMC.

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